Gate array circuits and applications specific integrated circuits (ASIC) have become important technologies for commercial applications of integrated circuits. The basic economic justification for these technologies is that integrated circuits can be more easily designed by using an array of standard circuits connected in a unique configuration or a library of standard cells which can be selected and interconnected. As a result, the specific design process for an integrated circuit becomes a definition of the particular interconnection of standard circuits or cells. This is frequently done by designing a unique last metal layer in a fabrication step that interconnects the various circuits of the device. However, with such procedure the selection of a particular design is fixed with regard to that circuit, that is, it cannot be changed. A new design must be implemented in a new part, rather than making a change in an old part.
The present invention is directed to a method for establishing selected interconnections, open or closed, between circuit nodes of an integrated circuit. These interconnections are established in a programmable manner such that the set-up of the entire circuit is done upon receipt of a programming signal, rather than by physically applying a mask layer and etching that layer to form interconnections. The present invention further provides that the programmability is non-volatile so that the state of the programmed circuit is not affected by loss of power. Thus, with the present invention, a standard circuit can be converted into a unique design merely by the application of programming signals. Further, any changes in the design can be implemented by changing the programmed interconnections. Thus, the present invention reduces the design, and redesign costs for standard circuit-based integrated circuit.